Concept and development of high-performance hardware accelerators for neural networks
AI applications are becoming increasingly important for the automotive sector. Special accelerators are needed to enable efficient execution of these networks. One example is the Gemmini accelerator, an open-source project that is part of the RISC-V world.
It is interesting mainly because of its high flexibility. Through parameterization, the architecture can be scaled for different performance requirements and unused components can be removed.
The task is to further improve the basic architecture, e.g. by inserting mechanisms that guarantee the security of execution, sparsity, new activation functions, etc. If interested, the topic can be freely chosen after consultation with the supervisors.
The task can be divided into the following steps:
- Familiarization with the basic architecture
- Familiarization with the chosen topic
- Conception of the hardware realization
- Implementation, test and validation on an FPGA board
- Knowledge of Scala and Chisel is helpful, but not necessary
- Interest in accelerator and hardware design
- Knowledge about the use of AI algorithms on accelerators