Fabian Kreß, M. Sc.
- Wissenschaftlicher Mitarbeiter
- Group: Prof. Becker
- Room: 125.1
CS 30.10 - Phone: +49 721 608-41313
- fabian kress ∂does-not-exist.kit edu
Engesserstr. 5
76131 Karlsruhe
Design Space Exploration for Embedded AI Applications
Today, applications such as object detection or classification in the field of autonomous driving are usually realized by using Artificial Intelligence (AI). In contrast to conventional algorithms, AI can often provide more precise and reliable results. However, AI-based applications usually require to process a huge amount of operations. In the context of embedded platforms, it is therefore important to investigate, how latency, data throughput and power consumption of the system can be optimized considering the constraints imposed by the application.
Emerging Non-Volatile Memory Technologies
In recent decades, novel Non-Volatile Memory technologies (NVMs), such as MRAM or ReRAM, have been introduced and developed further. Emerging NVMs in general consume less static power than SRAM or DRAM and require only a fraction of the area compared to an SRAM cell. Additionally, these technologies enable efficient In-Memory Computing to accelerate matrix-vector multiplications, for example. Therefore, NVMs offer the opportunity to rethink established memory hierarchies and computer architectures for future systems.
Embedded FPGA Architecture and Toolchain
Embedded FPGAs (eFPGA) add flexibility to the entire system by allowing hardware reconfiguration during runtime. Hence, various workloads can be accelerated and the hardware accelerators themselves can also be updated. However, the initial layout of the eFPGA has to be defined before tape-out. This involves not only determining the number of LUTs but also the design of application-specific IPs. The integration of an eFPGA thus increases the complexity in the design phase which requires improved toolchains.
Supervised student works (selection)
- SA: “Emerging Memory Technologies and their use in new System Architectures”
- BA: „Hypervisor-based Framework for Evaluation of emerging Memory Technologies“
- SA: „Emerging Memory Technologies in future Computer Architectures“
- MA: „A Low-Power RISC-V Core for Tiny Machine Learning“
- MA: „Development of an FPGA Synthesis-Toolchain for automated Integration of Hybrid Flip-Flops“
- SA: „Evaluation of external Memories for Neural Network Inference in IoT devices“
- SA: „Energy-efficient AI accelerators for Online Handwriting Recognition“
- SA: „Evaluation of Optimization Strategies for Neural Networks in the Digipen for Online Handwriting Recognition“
- MA: „Hardware/Software Co-Design of an Ultra-Low Power RISC-V Platform for Online Handwriting Recognition“
| title | type |
|---|---|
| Development of a RISC-V based Platform for efficient Temporal Convolutional Network Inference in embedded Systems | Masterarbeit |
Publications
Kreß, F.; Sidorenko, V.; Schmidt, P.; Hoefer, J.; Hotfilter, T.; Walter, I.; Harbaum, T.; Becker, J.
2023. Computer Networks, 229, Article no: 109759. doi:10.1016/j.comnet.2023.109759
Hotfilter, T.; Schmidt, P.; Höfer, J.; Kreß, F.; Harbaum, T.; Becker, J.
2023. DroneSE and RAPIDO: System Engineering for constrained embedded systems, 73–78, Association for Computing Machinery (ACM). doi:10.1145/3579170.3579258
Kreß, F.; Hoefer, J.; Hotfilter, T.; Walter, I.; El Annabi, E. M.; Harbaum, T.; Becker, J.
2023. Machine Learning and Principles and Practice of Knowledge Discovery in Databases. Hrsg.: I. Koprinska. Pt. 1, 557–568, Springer International Publishing. doi:10.1007/978-3-031-23618-1_37
Kempf, F.; Höfer, J.; Kreß, F.; Hotfilter, T.; Harbaum, T.; Becker, J.
2022. Conference Proceedings: 2022 IEEE 35th International System-on-Chip Conference (SOCC) Ed.: S. Sezer, 1–6, Institute of Electrical and Electronics Engineers (IEEE). doi:10.1109/SOCC56010.2022.9908110
Hotfilter, T.; Kreß, F.; Kempf, F.; Becker, J.; Baili, I.
2022. 2022 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), Nicosia, Cyprus, 04-06 July 2022, 371–372. doi:10.1109/ISVLSI54635.2022.00082
Kreß, F.; Hoefer, J.; Hotfilter, T.; Walter, I.; Sidorenko, V.; Harbaum, T.; Becker, J.
2022. 18th International Conference on Distributed Computing in Sensor Systems (DCOSS), 133–140, IEEEXplore. doi:10.1109/DCOSS54816.2022.00034
Kreß, F.; Serdyuk, A.; Hotfilter, T.; Höfer, J.; Harbaum, T.; Becker, J.; Hamann, T.
2022. 2022 11th Mediterranean Conference on Embedded Computing (MECO). Ed.: IEEE, Institute of Electrical and Electronics Engineers (IEEE). doi:10.1109/MECO55406.2022.9797131
Hotfilter, T.; Kreß, F.; Kempf, F.; Becker, J.; Haro, J. M. De; Jiménez-González, D.; Moretó, M.; Álvarez, C.; Labarta, J.; Baili, I.
2022. 2022 Design, Automation & Test in Europe Conference & Exhibition (DATE), Antwerp, Belgium, 14-23 March 2022, 628–631, Institute of Electrical and Electronics Engineers (IEEE). doi:10.23919/DATE54114.2022.9774716
Hotfilter, T.; Hoefer, J.; Kreß, F.; Kempf, F.; Becker, J.
2021. IEEE 34th International System-on-Chip Conference (SOCC), 14th-17th September 2021, Las Vegas, Nevada, USA, 83–88, Institute of Electrical and Electronics Engineers (IEEE). doi:10.1109/SOCC52499.2021.9739212
Lesniak, F.; Kreß, F.; Becker, J.
2021. Applied Reconfigurable Computing. Ed.: S. Derrien, 221–231, Springer Nature Switzerland AG. doi:10.1007/978-3-030-79025-7_15
Masing, L.; Srivatsa, A.; Kreß, F.; Anantharajaiah, N.; Herkersdorf, A.; Becker, J.
2018. IEEE 12th International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSoC), Hanoi, VN, September 12-14, 2018, 138–145, Institute of Electrical and Electronics Engineers (IEEE). doi:10.1109/MCSoC2018.2018.00033
Masing, L.; Srivatsa, A.; Kreß, F.; Anantharajaiah, N.; Herkersdorf, A.; Becker, J.
2018. 12th International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSoC 2018), Hanoi, Vietnam, September 12–14, 2018