Anantharajaiah Nidhi, M. Sc.

Anantharajaiah Nidhi, M. Sc.

  • Engesserstr. 5

    76131 Karlsruhe

Research interests

Adaptive Networks-on-Chip for Mixed-Criticality Systems

Multiple applications of different criticality are increasingly being executed on the same System-on-Chip (SoC) platform to reduce resource consumption. These platforms are moving towards multi/many core architectures and can use Networks-on-Chip (NoC) for communication. With the increasing number of cores on such platforms, the complexity of the interconnect is increasing and it will become a limiting factor for performance.  Performance on such systems can be improved if the NoC is able to adapt at runtime to the requirements of different applications.

Routing algorithms for non-mesh based topologies in a Networks-on-Chip

Mesh topology is commonly implemented in Networks-on-Chip (NoC) due to its scalability, ease of implementation and uniform nature. With the increase in complexity of on-chip interconnects for large scale multi/many core systems, using the mesh topology can become inefficient due to high hop counts. Hierarchical and multilayered topologies, irregular topologies are being investigated to improve overall performance of the system. Routing in such NoCs can become challenging and investigations are conducted here into routing algorithms for regular and irregular topologies.

Teaching

Exercises for 2311616 Communication Systems and Protocols

Seminar: Embedded Systems (https://www.itiv.kit.edu/english/60_6321.php)

Student works to be assigned
title type
Investigating Adaptive Networks-on-Chip for Mixed-Criticality Systems Bachelor-/ Masterarbeit

Supervised student works (selection)

Seminar: Eingebettete Systeme:

  • Seminar: "Introduction and Analysis of Methods for Adaptive Networks-on-Chip"
  • Seminar: "Quality of Service in Adaptive Networks-on-Chip"

Bachelor / Master thesis:

  • MA: "Design and Implementation of an ACO Based Router for Mixed Criticality NoCs"
  • MA: "Improving Quality of Service in Adaptive Networks-on-Chip for Mixed-Criticality System"
  • MA. “Performance Comparison between the SXP and PCI Express Protocol with a Refinement Approach of SXP with Security”
  • BA: "Design and Implementation of a Self-Adaptive NoC"

Publications