RIGOLETTO - RISC-V generation of high-performance automotive processors and computing platforms

Motivation

The open source and open standard approach of RISC-V enables flexible, productive platforms for broad market access. RIGOLETTO will pave the way for further exploitation of the potential of RISC-V ISA (instruction set architecture) as a key technology to meet the requirements related to future Software Defined Vehicles and to support high-performance in-car computing and real-time processor architectures.

Project goals

The project objective is to expand and industrialize a European RISC-V automotive ecosystem for next-generation high-performance processors. RIGOLETTO will enable safe and reliable real-time automotive functions on an open RISC-V ISA, laying the foundation for a next-generation automotive computing platform. The project will develop a dedicated automotive processor family with accelerators, focusing on open source solutions and EDA tools for processor and chip design.

ITIV involvement

One aspect ITIV is working on is the design of accelerators for embedded and automotive AI applications by contributing to the full design-to-deployment toolchain. This includes an efficient accelerator, a co-design algorithm and automated mapping of complex AI workloads. The accelerator will provide software interfaces for integration through dedicated instruction set extensions for the automotive RISC-V architecture.