• Study of Electrical Engineering and Information Technology at KIT (2012 – 2017)
• Research assistant at ITIV since October 2017

Teaching

• Exercises on “Hardware-Synthese und -Optimierung” (since 2019, in German)

Research activities

• Model-based approaches to HW/SW integration in safety-critical embedded systems
• Isolation of hardware components in modern system-on-chip platforms
• Fault tolerance mechanisms based on dynamic hardware redundancy

Supervised theses

• Master thesis: “Development of a Configurable Access Protection Module for FPGA Components” (2020)

• Master thesis: “Development of an FPGA-Controlled Architecture for Dynamic On-Chip Redundancy of Safety-Critical Functions” (2020)

Available positions

Bachelor and master theses as well as student assistant positions in the context of the current research activities are avilable. Depending on your interest, these works can be focused on the modeling of HW/SW systems (AADL, Java, ...), the implementation of isolation and fault tolerance mechanisms (VHDL, Verilog, C, ...), or a combination of both fields. The vacancies shown below are suggestions that can be adapted to the desired focus.