oey

Dipl.-Ing. Oliver Oey

  • emmtrix Technologies GmbH
    Haid-und-Neu-Straße 7
    76131 Karlsruhe 

Dipl.-Ing. Oliver Wolf

Curriculum vitae

  • Studied electrical engineering and information technology at KIT
    • Degree: Diploma Nov. 2010
    • Title of the diploma thesis: Conception and implementation of heterogeneous communication principles and methods of adaptive function topologies for the Star-Wheels network
  • Employee at ITIV from 2011 to April 2017

Research project

  • ALMA research project (http://alma-project.eu/)
    • The aim of the ALMA EU project was to develop a software solution that can automatically generate parallelized C code for various embedded systems from Scilab/MATLAB programs. The approach was evaluated with applications from image processing and telecommunications on a commercial and a research processor.
  • Code generation
    • Structure of programs for parallel execution, structure of the control flow and abstraction of hardware properties.
  • Optimization of communication
    • Sensible placement of communication instructions, consideration of communication models and support of different architectures.
  • Parallelization
    • Automatic and manual parallelization, consideration of different types of parallelization and ensuring correct execution.
Supervised student work
Name Tätigkeit Aufgabengebiet
Diploma thesis 09.04.2014 (No. 1802) Extension of the Kahrisma architecture to include network-on-chip communication with architecture-specific optimizations
Master's thesis (No. 1822) Entwurf einer Kommunikations-API für parallele Prozessorsysteme am Beispiel der Kahrisma Architektur; Design of a Communication-API for Parallel Processor Systems Using the Example of the Kahrisma Architecture
Master thesis 28.11.2011 (No. 1503) Development and Implementation of an Ethernet Support for the Star-Wheels Network-on-Chip
Diploma thesis 28.11.2011 (No. 1511) Design and implementation of reliability mechanisms for the Star-Wheels Network-on-Chip
Diploma thesis 28.11.2011 (No. 1508) Design and implementation of a SystemC simulator for the Star-Wheels network-on-chip
Diploma thesis 06.02.2013 (No. 1637) Design and implementation of a SystemC simulator for an FPGA-based multiprocessor system
Master thesis 23.10.2015 (No. 2020) Characterization of embedded code generation from languages for numerical calculations; Characterization of embedded code generation from languages for numerical calculations

Publications


2019
Journal Articles
Worst-Case Execution-Time-Aware Parallelization of Model-Based Avionics Applications
Reder, S.; Kempf, F.; Bucher, H.; Becker, J.; Alefragis, P.; Voros, N.; Skalistis, S.; Derrien, S.; Puaut, I.; Oey, O.; Stripf, T.; Ferdinand, C.; David, C.; Ulbig, P.; Mueller, D.; Durak, U.
2019. Journal of aerospace information systems, 16 (11), 521–533. doi:10.2514/1.I010749
2017
Journal Articles
Grafisch parallel programmieren
Oey, O.; Stripf, T.
2017. Elwis, (9), 48–51
Conference Papers
Interaktive Parallelisierung von Anwendungen für eingebettete Mehrkernprozessoren
Stripf, T.; Oey, O.
2017. parallel 2017, Softwarekonferenz für Parallel Programming, Concurrency, HPC und Multicore-Systeme, Heidelberg, 29.-31. März 2017
Increasing Energy Efficiency Through Semi-Automatic Parallelization of Applications for Embedded Computing Devices in the IoT Domain
Oey, O.; Rueckauer, M.; Stripf, T.; Becker, J.
2017. Embedded World Conference 2017, 14. bis 16. März 2017, Nürnberg
2016
Conference Papers
Effiziente Embedded-Multicore-Programmierung - Automatische Parallelisierung von Scilab/MATLAB-Anwendungen
Stripf, T.; Rückauer, M.; Oey, O.
2016. Tagungsband zum Workshop der Multiprojekt-Chip-Gruppe Baden-Württemberg (MPC), 55. Workshop: Karlsruhe, Februar 2016. Hrsg.: M. Ihle, 9–14
Plattformübergreifende Software für Multicore & FPGAs
Stripf, T.; Rueckauer, M.; Oey, O.
2016. Tagungsband Embedded Software Engineering Kongress 2016, 28.11. bis zum 2.12. 2016, Sindelfingen, 211–217
2015
Conference Papers
Effiziente Embedded-Multicore-Programmierung
Oey, O.; Stripf, T.
2015. Tagungsband - Embedded Software Engineering Kongress 2015 : 30. November bis 4. Dezember 2015, Sindelfingen, 236–242, Elektronikpraxis
2014
Conference Papers
A Hierarchical Architecture Description for Flexible Multicore System Simulation
Bruckschloegl, T.; Oey, O.; Rueckauer, M.; Stripf, T.; Becker, J.
2014. 2014 IEEE International Symposium on Parallel and Distributed Processing with Applications (ISPA), 190–196, Institute of Electrical and Electronics Engineers (IEEE). doi:10.1109/ISPA.2014.33
Profile-Guided Compilation of Scilab Algorithms for Multiprocessor Systems
Becker, J.; Bruckschloegl, T.; Oey, O.; Stripf, T.; Goulas, G.; Raptis, N.; Valouxis, C.; Alefragis, P.; Voros, N. S.; Gogos, C.
2014. Reconfigurable Computing: Architectures, Tools, and Applications : 10th International Symposium, ARC 2014, Vilamoura, Portugal, April 14-16, 2014. Proceedings. Ed.: D.Göhringer, 330–336, Springer. doi:10.1007/978-3-319-05960-0_37
2013
Journal Articles
Compiling Scilab to high performance embedded multicore systems
Stripf, T.; Oey, O.; Bruckschloegl, T.; Becker, J.; Rauwerda, G.; Sunesen, K.; Goulas, G.; Alefragis, P.; Voros, N. S.; Derrien, S.; Sentieys, O.; Kavvadias, N.; Dimitroulakos, G.; Masselos, K.; Kritharidis, D.; Mitas, N.; Perschke, T.
2013. Microprocessors and Microsystems, 37 (8 Part C), 1033–1049. doi:10.1016/j.micpro.2013.07.004
Reliable and adaptive network-on-chip architectures for cyber physical systems
Göhringer, D.; Meder, L.; Oey, O.; Becker, J.
2013. ACM Transactions on Embedded Computing Systems, 12 (1), 51/1–21. doi:10.1145/2435227.2435247
Conference Papers
Coarse-grain optimization and code generation for embedded multicore systems
Goulas, G.; Valouxis, C.; Alefragis, P.; Voros, N. S.; Gogos, C.; Oey, O.; Stripf, T.; Bruckschloegl, T.; Becker, J.; El Moussawi, A.; Naullet, M.; Yuki, T.
2013. Proceedings - 16th Euromicro Conference on Digital System Design, DSD 2013, 4-6 September 2013, Santander, Spain. Ed.: J. S. Matos, 379–386, Institute of Electrical and Electronics Engineers (IEEE). doi:10.1109/DSD.2013.48
A flexible implementation of the PSO algorithm for fine-and coarse-grained reconfigurable embedded systems
Rueckauer, M.; Munoz, D. M.; Stripf, T.; Oey, O.; Llanos, C. H.; Becker, J.
2013. 2013 International Conference on Reconfigurable Computing and FPGAs, ReConFig 2013, Cancun, Mexico December 9-11, 2013. Ed.: R. Cumplido, Institute of Electrical and Electronics Engineers (IEEE). doi:10.1109/ReConFig.2013.6732293
2012
Journal Articles
Adaptive Multiclient Network-on-Chip Memory Core : Hardware Architecture, Software Abstraction Layer, and Application Exploration
Göhringer, D.; Meder, L.; Werner, S.; Oey, O.; Becker, J.; Hübner, M.
2012. International journal of reconfigurable computing, 2012, Art.Nr. 298561. doi:10.1155/2012/298561
Conference Papers
A Compilation- and Simulation-Oriented Architecture Description Language for Multicore Systems
Stripf, T.; Oey, O.; Bruckschloegl, T.; Koenig, R.; Becker, J.; Goulas, G.; Alefragis, P.; Voros, N. S.; Potman, J.; Sunesen, K.; Derrien, S.; Sentieys, O.
2012. 2012 IEEE 15th International Conference on Computational Science and Engineering (CSE 2012) : Paphos, Cyprus, 5 - 7 December 2012 ; [held in conjunction with the 10th IEEE/IFIP International Conference on Embedded and Ubiquitous Computing (EUC 2012) and the 6th International Workshop on Ubiquitous Underwater Sensor Networks (UUWSN 2012) ; proceedings], 383–390, Institute of Electrical and Electronics Engineers (IEEE). doi:10.1109/iccse.2012.60
From Scilab to multicore embedded systems: Algorithms and methodologies
Goulas, G.; Alefragis, P.; Voros, N. S.; Valouxis, C.; Gogos, C.; Kavvadias, N.; Dimitroulakos, G.; Masselos, K.; Goehringer, D.; Derrien, S.; Menard, D.; Sentieys, O.; Huebner, M.; Stripf, T.; Oey, O.; Becker, J.; Rauwerda, G.; Sunesen, K.; Kritharidis, D.; Mitas, N.
2012. 2012 International Conference on Embedded Computer Systems (SAMOS 2012) : Samos, Greece, 16 - 18 July 2012. Ed.: John McAllister, 268–275, Institute of Electrical and Electronics Engineers (IEEE). doi:10.1109/samos.2012.6404184
From Scilab to High Performance Embedded Multicore Systems: The ALMA Approach
Becker, J.; Stripf, T.; Oey, O.; Huebner, M.; Derrien, S.; Menard, D.; Sentieys, O.; Rauwerda, G.; Sunesen, K.; Kavvadias, N.; Masselos, K.; Goulas, G.; Alefragis, P.; Voros, N. S.; Kritharidis, D.; Mitas, N.; Goehringer, D.
2012. 2012 15th Euromicro Conference on Digital System Design (DSD 2012) : Cesme, Izmir, Turkey, 5 - 8 September 2012. Ed.: Smail Niar, 114–121, Institute of Electrical and Electronics Engineers (IEEE). doi:10.1109/dsd.2012.65
Virtualization of heterogeneous and adaptive multi-care / multi-board systems
Oey, O.; Werner, S.; Göhringer, D.; Stuckert, A.; Becker, J.; Hübner, M.
2012. The 2012 Conf. on Design and Architectures for Signal and Image Processing (DASIP 2012), Karlsruhe, October 23-25, 2012. Ed.: A. Morawiec, ECSI Electronic Chips and Systems Design Initiative
Virtualized on-chip distributed computing for heterogeneous reconfigurable multi-core systems
Werner, S.; Oey, O.; Goehringer, D.; Huebner, M.; Becker, J.
2012. Proceedings of the Design, Automation Test in Europe Conference Exhibition (DATE’12), Dresden, March 12-16, 2012. Ed.: K. Preas, 280–283, Institute of Electrical and Electronics Engineers (IEEE)
A flexible approach for compiling scilab to reconfigurable multi-core embedded systems
Stripf, T.; Oey, O.; Bruckschloegl, T.; Koenig, R.; Huebner, M.; Becker, J.; Goulas, G.; Alefragis, P.; Voros, N. S.; Rauwerda, G.; Sunesen, K.; Derrien, S.; Menard, D.; Sentieys, O.; Kavvadias, N.; Dimitroulakos, G.; Masselos, K.; Goehringer, D.; Perschke, T.; Kritharidis, D.; et al.
2012. Proceedings of the 7th International Workshop on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC’12), York, United Kingdom, July 9-11, 2012. Ed.: L. S. Indrusiak, 8 S., Institute of Electrical and Electronics Engineers (IEEE). doi:10.1109/ReCoSoC.2012.6322879
Presentations
Virtualization of heterogeneous and adaptive multi-care / multi-board systems
Oey, O.; Werner, S.; Göhringer, D.; Stuckert, A.; Becker, J.; Hübner, M.
2012. Conf.on Design and Architectures for Signal and Image Processing (DASIP 2012), Karlsruhe, October 23-25, 2012
A flexible approach for compiling scilab to reconfigurable multi-core embedded systems
Stripf, T.; Oey, O.; Bruckschloegl, T.; Koenig, R.; Huebner, M.; Becker, J.; Rauwerda, G.; Sunesen, K.; Kavvadias, N.; Dimitroulakos, G.; Masselos, L.; Kritharidis, D.; Mitas, N.; Goulas, G.; Alefragis, P.; Voros, N. S.; Derrien, S.; Menard, D.; Sentieys, O.; Goehringer, D.; et al.
2012. 7th Internat.Workshop on Reconfigurable and Communication-Centric Systems on Chip (ReCoSoC), York, GB, July 9-11, 2012
2011
Conference Papers
Heterogeneous and runtime parameterizable Star-Wheels Network-on-Chip
Goehringer, D.; Oey, O.; Huebner, M.; Becker, J.
2011. International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS’11), Samos, Greece, July 18-21, 2011. Ed.: L. Carro, 380–387, Institute of Electrical and Electronics Engineers (IEEE)