Dr.-Ing. Dipl.-Inform. Tanja Harbaum

Dr.-Ing. Dipl.-Inform. Tanja Harbaum

  • Engesserstr. 5

    76131 Karlsruhe

Forschung

Entwurf adaptiver Hardwarearchitekturen

Die Anforderungen, die an Mikroarchitekturen gestellt werden, steigen stetig, ein Großteil der technologischen Innovationen der letzten Jahrzehnte ist erst durch den Fortschritt der Halbleiterindustrie und den damit verbundenen Performanzsteigerungen integrierter Schaltkreise möglich geworden. Eine weitere Performanzsteigerung integrierter Schaltkreise ist durch das Erreichen von physikalischen Grenzen nicht mehr selbstverständlich. Es müssen neue Architekturen entworfen werden, um an diesem Punkt auch weiterhin die steigenden Anforderungen erfüllen zu können.

Künstliche Intelligenz in eingebetteten Systemen

Die Performanz von eingebetteten Systemen kann durch die Integration von KI-Algorithmen, welche an die eingebettete Hardware angepasst werden, enorm gesteigert werden. Durch ein Hardware/Software Co-Design kann eine schnelle und effiziente KI-Ausführung auf eingebetteten Systemen realisiert werden. Für die Entwicklung neuer cyberphysikalischer Systeme (CPS) und Produkte des Internet der Dinge (IoT) wird KI zu einem immer wichtiger werdenden Faktor.

Offene studentische Arbeiten

Titel Typ

Betreute abgeschlossene studentische Arbeiten (Auswahl)

  • MA: “Konzeptioneller Entwurf eines modularen Sensornetzwerks für intelligente Textilanwendungen”
  • BA: ”Evaluation of Various Sensor Fusion Parameters for Online Handwriting Recognition and Trajectory Reconstruction”
  • MA: “Evaluation of Robustness against changing weather conditions of Multi Modal AI-based Object Detection”
  • MA: “Conceptual and Physical Design of a Hybrid Flexible Electronic System (HyFES) for Motion Tracking”
  • SA: “Appropriate Adaptive Algorithms Facing Emerging Challenges for Wearables”
  • SA: “A Review of Approximate Computing methods for a Universal Approximate Hardware Accelerator”
  • BA: "Design and Modeling of a Runtime Adaptive Accelerator for a Reconfigurable Processor Architecture"
  • MA: "Integration of runtime adaptive reconfiguration of hardware accelerators into a LEON3 architecture"
  • BA: "Design, Implementation and Evaluation of a Pipeline Architecture for an FPGA Memory Architecture with Pattern Recognition Capability"
  • MA: "Entwurf, Implementierung und Evaluierung einer FPGA-Speicherstruktur mit der Fähigkeit der Mustererkennung"
  • BA: "Design, Implementation and Evaluation of a Memory Architecture in XILINX B-RAM"

Publikationen


2024
Proceedingsbeiträge
Low-latency inter-domain communication on the Xen hypervisor
Lesniak, F.; Harbaum, T.; Becker, J.
2024. 2023 IEEE 16th International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSoC), Singapur, 18th - 21st December 2023, 340–346, Institute of Electrical and Electronics Engineers (IEEE). doi:10.1109/MCSoC60832.2023.00057
2023
Zeitschriftenaufsätze
EFFECT: An End-to-End Framework for Evaluating Strategies for Parallel AI Anomaly Detection
Stammler, M.; Höfer, J.; Kraus, D.; Schmidt, P.; Hotfilter, T.; Harbaum, T.; Becker, J.
2023. Procedia Computer Science, 222, 499 – 508. doi:10.1016/j.procs.2023.08.188
CNNParted: An open source framework for efficient Convolutional Neural Network inference partitioning in embedded systems
Kreß, F.; Sidorenko, V.; Schmidt, P.; Hoefer, J.; Hotfilter, T.; Walter, I.; Harbaum, T.; Becker, J.
2023. Computer Networks, 229, Article no: 109759. doi:10.1016/j.comnet.2023.109759
Proceedingsbeiträge
Design Space Exploration on Efficient and Accurate Human Pose Estimation from Sparse IMU-Sensing
Fürst-Walter, I.; Nappi, A.; Harbaum, T.; Becker, J.
2023. 2023 IEEE/RSJ International Conference on Intelligent Robots and Systems (IROS), Detroit, Mi, 1st-5th October 2023, 10888 – 10893, Institute of Electrical and Electronics Engineers (IEEE). doi:10.1109/IROS55552.2023.10341256
Leveraging Mixed-Precision CNN Inference for Increased Robustness and Energy Efficiency
Hotfilter, T.; Hoefer, J.; Merz, P.; Kreß, F.; Kempf, F.; Harbaum, T.; Becker, J.
2023. 2023 IEEE 36th International System-on-Chip Conference (SOCC), Santa Clara, USA, 05-08 September 2023, 1–6, Institute of Electrical and Electronics Engineers (IEEE). doi:10.1109/SOCC58585.2023.10256738
Approximate Accelerators: A Case Study using Runtime Reconfigurable Processors
Lesniak, F.; Harbaum, T.; Becker, J.
2023. 2023 IEEE 36th International System-on-Chip Conference (SOCC), Santa Clara, USA, 05-08 September 2023, 1–6, Institute of Electrical and Electronics Engineers (IEEE). doi:10.1109/SOCC58585.2023.10257090
Automated Replacement of State-Holding Flip-Flops to Enable Non-Volatile Checkpointing
Kreß, F.; Pfau, J.; Kempf, F.; Schmidt, P.; He, Z.; Harbaum, T.; Becker, J.
2023. 2023 IEEE Nordic Circuits and Systems Conference (NorCAS), 31st October - 1st November 2023, Aalborg, Denmark, 1–7, Institute of Electrical and Electronics Engineers (IEEE). doi:10.1109/NorCAS58970.2023.10305469
DREAM: Distributed Reinforcement Learning Enabled Adaptive Mixed-Critical NoC
Anantharajaiah, N.; Xu, Y.; Lesniak, F.; Harbaum, T.; Becker, J.
2023. IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 1–6, Institute of Electrical and Electronics Engineers (IEEE). doi:10.1109/ISVLSI59464.2023.10238569
A Hardware-Aware Sampling Parameter Search for Efficient Probabilistic Object Detection
Hoefer, J.; Hotfilter, T.; Kreß, F.; Qiu, C.; Harbaum, T.; Becker, J.
2023. Computer Vision Systems – 14th International Conference, ICVS 2023, Vienna, Austria, September 27–29, 2023. Ed.: H. Christensen, 299–309, Springer Nature Switzerland. doi:10.1007/978-3-031-44137-0_25
A Hardware-Centric Approach to Increase and Prune Regular Activation Sparsity in CNNs
Hotfilter, T.; Höfer, J.; Kreß, F.; Kempf, F.; Kraft, L.; Harbaum, T.; Becker, J.
2023. 2023 IEEE 5th International Conference on Artificial Intelligence Circuits and Systems (AICAS), 1–5, Institute of Electrical and Electronics Engineers (IEEE). doi:10.1109/AICAS57966.2023.10168566
SiFI-AI: A Fast and Flexible RTL Fault Simulation Framework Tailored for AI Models and Accelerators
Hoefer, J.; Kempf, F.; Hotfilter, T.; Kreß, F.; Harbaum, T.; Becker, J.
2023. Proceedings of the Great Lakes Symposium on VLSI 2023, 287–292, Association for Computing Machinery (ACM). doi:10.1145/3583781.3590226
Non-Intrusive Runtime Monitoring for Manycore Prototypes
Lesniak, F.; Anantharajaiah, N.; Harbaum, T.; Becker, J.
2023. RAPIDO ’23: Proceedings of the DroneSE and RAPIDO: System Engineering for constrained embedded systems, 31–38, Association for Computing Machinery (ACM). doi:10.1145/3579170.3579262
An Analytical Model of Configurable Systolic Arrays to find the Best-Fitting Accelerator for a given DNN Workload
Hotfilter, T.; Schmidt, P.; Höfer, J.; Kreß, F.; Harbaum, T.; Becker, J.
2023. DroneSE and RAPIDO: System Engineering for constrained embedded systems, 73–78, Association for Computing Machinery (ACM). doi:10.1145/3579170.3579258
Automated Search for Deep Neural Network Inference Partitioning on Embedded FPGA
Kreß, F.; Hoefer, J.; Hotfilter, T.; Walter, I.; El Annabi, E. M.; Harbaum, T.; Becker, J.
2023. Machine Learning and Principles and Practice of Knowledge Discovery in Databases. Hrsg.: I. Koprinska. Pt. 1, 557–568, Springer International Publishing. doi:10.1007/978-3-031-23618-1_37
2022
Proceedingsbeiträge
Runtime Adaptive Cache Checkpointing for RISC Multi-Core Processors
Kempf, F.; Höfer, J.; Kreß, F.; Hotfilter, T.; Harbaum, T.; Becker, J.
2022. Conference Proceedings: 2022 IEEE 35th International System-on-Chip Conference (SOCC) Ed.: S. Sezer, 1–6, Institute of Electrical and Electronics Engineers (IEEE). doi:10.1109/SOCC56010.2022.9908110
Hardware-aware Partitioning of Convolutional Neural Network Inference for Embedded AI Applications
Kreß, F.; Hoefer, J.; Hotfilter, T.; Walter, I.; Sidorenko, V.; Harbaum, T.; Becker, J.
2022. 18th International Conference on Distributed Computing in Sensor Systems (DCOSS), 133–140, IEEEXplore. doi:10.1109/DCOSS54816.2022.00034
Hardware-aware Workload Distribution for AI-based Online Handwriting Recognition in a Sensor Pen
Kreß, F.; Serdyuk, A.; Hotfilter, T.; Höfer, J.; Harbaum, T.; Becker, J.; Hamann, T.
2022. 2022 11th Mediterranean Conference on Embedded Computing (MECO). Ed.: IEEE, Institute of Electrical and Electronics Engineers (IEEE). doi:10.1109/MECO55406.2022.9797131
2020
Proceedingsbeiträge
A Hardware Perspective on the ChaCha Ciphers: Scalable Chacha8/12/20 Implementations Ranging from 476 Slices to Bitrates of 175 Gbit/s
Pfau, J.; Reuter, M.; Harbaum, T.; Hofmann, K.; Becker, J.
2020. 2019 32nd IEEE International System-on-Chip Conference (SOCC), Singapore, 3-6 Sept. 2019, 294–299, Institute of Electrical and Electronics Engineers (IEEE). doi:10.1109/SOCC46988.2019.1570548289
2019
Dissertationen
2018
Proceedingsbeiträge
A Content-Adapted FPGA Memory Architecture with Pattern Recognition Capability and Interval Compressing Technique
Harbaum, T.; Balzer, M.; Becker, J.; Weber, M.
2018. Proceedings of the 31th IEEE International System-on-Chip Conference (SOCC), 118–123, Institute of Electrical and Electronics Engineers (IEEE). doi:10.1109/SOCC.2018.8618493
2017
Proceedingsbeiträge
Auto-SI: An adaptive reconfigurable processor with run-time loop detection and acceleration
Harbaum, T.; Schade, C.; Damschen, M.; Tradowsky, C.; Bauer, L.; Henkel, J.; Becker, J.
2017. 2017 30th IEEE International System-on-Chip Conference (SOCC), Munich, 5–8 September 2017, 153–158, Institute of Electrical and Electronics Engineers (IEEE). doi:10.1109/SOCC.2017.8226027
2016
Zeitschriftenaufsätze
Search for pair-produced vectorlike B quarks in proton-proton collisions at √s =8 TeV
CMS Collaboration; Khachatryan, V.; Sirunyan, A. M.; Tumasyan, A.; Adam, W.; Asilar, E.; Bergauer, T.; Brandstetter, J.; Brondolin, E.; Dragicevic, M.; Erö, J.; Flechl, M.; Friedl, M.; Frühwirth, R.; Ghete, V. M.; Hartl, C.; Hörmann, N.; Hrubec, J.; Jeitler, M.; Harbaum, T.; u. a.
2016. Physical review / D, 93 (11), 112009. doi:10.1103/PhysRevD.93.112009
Proceedingsbeiträge
A Novel ADL-based Approach to Design Adaptive Application-Specific Processors
Tradowsky, C.; Harbaum, T.; Masing, L.; Becker, J.
2016. Best of ISVLSI 2016, Pittsburgh, Pennsylvania, U.S.A., July 11-13, 2016, Springer
A Content Adapted FPGA Memory Architecture with Pattern Recognition Capability for L1 Track Triggering in the LHC Environment
Harbaum, T.; Seboui, M.; Balzer, M.; Becker, J.; Weber, M.
2016. 24th IEEE International Symposium on Field-Programmable Custom Computing Machines, FCCM 2016; Washington; United States; 1 May 2016 through 3 May 2016, 184–191, Institute of Electrical and Electronics Engineers (IEEE). doi:10.1109/FCCM.2016.52
An FPGA-based track finder for the L1 trigger of the CMS experiment at the high luminosity LHC
Amstutz, C.; Ball, F. A.; Balzer, M. N.; Brooke, J.; Calligaris, L.; Cieri, D.; Clement, E. J.; Hall, G.; Harbaum, T. R.; Harder, K.; Hobson, P. R.; Iles, G. M.; James, T.; Manolopoulos, K.; Matsushita, T.; Morton, A. D.; Newbold, D.; Paramesvaran, S.; Pesaresi, M.; Reid, I. D.; u. a.
2016. 20th Real Time Conference (RT), IEEE-NPSS, Padova, Italy, 6-10 June 2016, Institute of Electrical and Electronics Engineers (IEEE). doi:10.1109/RTC.2016.7543102
Emulation of a prototype FPGA track finder for the CMS Phase-2 upgrade with the CIDAF emulation framework
Amstutz, C.; Ball, F. A.; Balzer, M. N.; Brooke, J.; Calligaris, L.; Cieri, D.; Clement, E. J.; Hall, G.; Harbaum, T. R.; Harder, K.; Hobson, P. R.; Iles, G. M.; James, T.; Manolopoulos, K.; Matsushita, T.; Morton, A. D.; Newbold, D.; Paramesvaran, S.; Pesaresi, M.; Reid, I. D.; u. a.
2016. 20th Real Time Conference (RT) IEEE-NPSS, Padova, Italy, 6-10 June 2016, Institute of Electrical and Electronics Engineers (IEEE). doi:10.1109/RTC.2016.7543110
2015
Zeitschriftenaufsätze
Combined measurement of the higgs boson mass in pp collisions at s =7 and 8 TeV with the ATLAS and CMS experiments
Aad, G.; Abbott, B.; Abdallah, J.; Abdinov, O.; Aben, R.; Abolins, M.; Abouzeid, O. S.; Abramowicz, H.; Abreu, H.; Abreu, R.; Abulaiti, Y.; Acharya, B. S.; Adamczyk, L.; Adams, D. L.; Adelman, J.; Adomeit, S.; Adye, T.; Affolder, A. A.; Agatonovic-Jovin, T.; Harbaum, T.; u. a.
2015. Physical review letters, 114 (19), 191803. doi:10.1103/PhysRevLett.114.191803
2013
Proceedingsbeiträge
LImbiC: An adaptable architecture description language model for developing an application-specific image processor
Tradowsky, C.; Harbaum, T.; Deyerle, S.; Becker, J.
2013. IEEE Computer Society Annual Symposium on VLSI (ISVLSI’13), Natal, Brazil, August 5-7, 2013, 34–39, Institute of Electrical and Electronics Engineers (IEEE). doi:10.1109/ISVLSI.2013.6654619
2012
Proceedingsbeiträge
A Student-built Ball-throwing Robotic Companion for Hands-on Robotics Education
Oberländer, J.; Harbaum, T.; Kurz, G.; Ahmed, N.; Kos-Grabar, T.; Hermann, A.; Roenau, A.; Dillmann, R.
2012. Field robotics : proceedings of the 14th International Conference on Climbing and Walking Robots and the Support Technologies for Mobile Machines, CLAWAR 2011, Paris, France, 6-8 September 2011. Ed.: P. Bidaud, 233–240, World Scientific Publishing