- O. Sander, F. Bapp, T. Sandmann, L. Dieudonne, J. Becker
The promised future of multi-core processors in avionics systems
In CEAS Aeronautical Journal, 2016
Zusammenfassung:
Modern airplanes need to satisfy rising requirements in terms of functionality and fuel efficiency per passenger.
Therefore, an ever-increasing amount of electronics is being integrated in the airplanes either by adding new
functionalities or by exchanging mechanical systems by more complex and highly integrated mechatronic ones,
optimizing the space, weight and energy used by the airplane infrastructure. Embedded computers are the base of this
development and have to perform more and more tasks with at least the same safety characteristics as before. In the
last fifteen years, to limit the ever-increasing number of computers in new airplanes, different functions traditionally
realized in separated devices must be grouped together in one. For safety reasons, until now it has been only done
based on single-core processors: the multicore-technology could not insure the same level of confidence as for singlecore
controllers - they were designed mainly to gain performance. But the performance of the current single-core
processors adequate for embedded and safety-critical applications is limited and therefore restricts the grouping of
applications. The automotive industry is meeting similar but still stronger increasing performance challenges. In this
sector, the multicore processors are already considered as the only known solution to fulfil the rising requirements and
are therefore expected to completely replace single-core processors in a few years. Specific multicore-processor
architectures and functionalities improving safety capabilities have currently been developed. The goal of this
contribution is to show how avionics might benefit from using these automotive multicore processors.
BibTeX: Anzeigen
- F. Bapp, O. Sander, T. Sandmann, H. Stoll, J. Becker
Programmable Logic as Device Virtualization Layer in Heterogeneous Multicore Architectures
In Applied Reconfigurable Computing: 12th International Symposium, ARC 2016 Mangaratiba, RJ, Brazil, March 22--24, 2016, Band 9625, S. 273-286, 2016
Zusammenfassung:
In latest heterogeneous multicore architectures, the number of cores competing for a shared resource is further increasing. Such shared resources range from simple I/O interfaces to memory controllers. The performance of the complete System-On-Chip (SoC) is directly correlated to the sharing of resources. Especially the hardly predictable blocking of resources for a certain time, forces the system to slow down in a way that is not intended. Hence new concepts for the sharing of resources need to be developed. The use of virtualization provides possibilities to handle the sharing of resources but always introduces an overhead in software in form of a hypervisor and also needs support on hardware level.
In this contribution we explore the idea of using the FPGA fabric as intermediate hardware virtualization layer between the cores and existing peripherals in a heterogeneous multicore SoC. This paper applies the idea exemplarily to Controller Area Network (CAN) virtualization, including concept and evaluation. We show the transparency of a virtualization layer and its introduction with low overhead of area and latency, which might serve as efficient add-on in a virtualized environment.
This work was funded within the project ARAMiS by the German Federal Ministry for Education and Research with the funding IDs 01IS11035. The responsibility for the content remains with the authors.
BibTeX: Anzeigen
- D. V. Vu, O. Sander, T. Sandmann, J. Heidelberger, S. Baehr, J. Becker
On-Demand Reconfiguration for Coprocessors in Mixed Criticality Multicore Systems
In 7th International Workshop on Dependable Many-Core Computing (DMCC 2015), 2015
Zusammenfassung:
Especially in complex system-of-systems scenarios, where multiple high-performance or real-time processing functions need to co-exist and interact, reconfigurable devices together with virtualization techniques show considerable promise to increase efficiency, ease integration and maintain functional and non-functional properties of the individual functions. In a previous work, we proposed a concept that leverages the advantages of FPGA's partial reconfiguration in heterogeneous mixed criticality multicore systems. The basic idea how to handle the partial reconfiguration transparently for non-critical tasks, while providing full control and a predictable behavior for safety relevant tasks was described. In this paper, we focus on the on-demand partial reconfiguration of non-critical coprocessor and its implementation details. Our prototype is implemented on an Intel multicore system and a Xilinx Virtex-7 FPGA connected via PCI Express (PCIe), taking advantage of the Single-Root I/O Virtualization (SR-IOV) capabilities in modern PCIe implementations. Experimental results show that our concept achieves significantly shorter reconfiguration time with lower variance under various load situations.
Download:
Momentan nicht verfügbar
BibTeX: Anzeigen
Zusammenfassung:
Especially in complex system-of-systems scenarios, where multiple high-performance or real-time processing functions need to co-exist and interact, reconfigurable devices together with virtualization techniques show considerable promise to increase efficiency, ease integration and maintain functional and non-functional properties of the individual functions. In a previous work, we proposed a concept that leverages the advantages of FPGA's partial reconfiguration in heterogeneous mixed criticality multicore systems. The basic idea how to handle the partial reconfiguration transparently for non-critical tasks, while providing full control and a predictable behavior for safety relevant tasks was described. In this paper, we focus on the on-demand partial reconfiguration of non-critical coprocessor and its implementation details. Our prototype is implemented on an Intel multicore system and a Xilinx Virtex-7 FPGA connected via PCI Express (PCIe), taking advantage of the Single-Root I/O Virtualization (SR-IOV) capabilities in modern PCIe implementations. Experimental results show that our concept achieves significantly shorter reconfiguration time with lower variance under various load situations.
Download:
Momentan nicht verfügbar
BibTeX: Anzeigen
- F. Bapp, O. Sander, T. Sandmann, D. V. Vu, S. Baehr, J. Becker
Adapting Commercial Off-The-Shelf Multicore Processors for Safety-Related Automotive Systems Using Online Monitoring
In SAE 2015 World Congress and Exhibition, 2015
Zusammenfassung:
Multicores, being the latest state-of-the-art technology, gain more and more importance in automotive and aerospace systems. This technology will not only be used in infotainment and non-safety-critical applications but will also be introduced in upcoming safety-critical systems. At the moment, various commercial off-the-shelf processors are available that are, however, not built for such applications. In order to ensure correct system behavior, online monitoring can be used for processors targeting infotainment or general purpose applications. The cores and other bus masters within the MPSoC compete for the exclusive use of shared resources like a memory controller. It is of high importance to provide guarantees of usage in such cases, e.g. in terms of access time and rates. For this purpose we present an online monitoring based on a commercial off-the-shelf multicore processor that provides knowledge about the usage of the direct memory access (DMA) controller in terms of accesses and activation sources. Furthermore, with this information, conclusions about the memory controller workload are drawn. The concept is implemented by using Freescale’s i.MX6 Quad platform, which is targeting automotive infotainment. This paper aims to show how such general purpose multicore processors can be partly adapted to provide evidence for safety related systems.
BibTeX: Anzeigen
Zusammenfassung:
Multicores, being the latest state-of-the-art technology, gain more and more importance in automotive and aerospace systems. This technology will not only be used in infotainment and non-safety-critical applications but will also be introduced in upcoming safety-critical systems. At the moment, various commercial off-the-shelf processors are available that are, however, not built for such applications. In order to ensure correct system behavior, online monitoring can be used for processors targeting infotainment or general purpose applications. The cores and other bus masters within the MPSoC compete for the exclusive use of shared resources like a memory controller. It is of high importance to provide guarantees of usage in such cases, e.g. in terms of access time and rates. For this purpose we present an online monitoring based on a commercial off-the-shelf multicore processor that provides knowledge about the usage of the direct memory access (DMA) controller in terms of accesses and activation sources. Furthermore, with this information, conclusions about the memory controller workload are drawn. The concept is implemented by using Freescale’s i.MX6 Quad platform, which is targeting automotive infotainment. This paper aims to show how such general purpose multicore processors can be partly adapted to provide evidence for safety related systems.
BibTeX: Anzeigen
- D. Adam, S. Tverdyshev, C. Rolfes, T. Sandmann, S. Baehr, O. Sander, J. Becker, U. Baumgarten
Two Architecture Approaches for MILS Systems in Mobility Domains (Automobile, Railway and Avionik)
In International Workshop on MILS: Architecture and Assurance for Secure Systems (MILS 2015), 2015
Zusammenfassung:
Systems with mixed and independent levels of security and safety become more and more important in the future. In the German funded Bundesministerium fuer Bildung und Forschung (BMBF) research project ARAMiS (Automotive, Railway and Avionic Multicore Systems) different industry and scientiffic partners concerned on using multi-core processor for different security and safety critical use-cases. This paper describes the motivation and use-cases behind the research actives in different mobility domains. Also two detailed descriptions and a comparison of two implementation for Multiple Independent Levels of Security and Safety (MILS) systems in mobility domains are included. In the end of the paper a outlook is given on potential further research activities on this research topic.
Download:
Momentan nicht verfügbar
BibTeX: Anzeigen
Zusammenfassung:
Systems with mixed and independent levels of security and safety become more and more important in the future. In the German funded Bundesministerium fuer Bildung und Forschung (BMBF) research project ARAMiS (Automotive, Railway and Avionic Multicore Systems) different industry and scientiffic partners concerned on using multi-core processor for different security and safety critical use-cases. This paper describes the motivation and use-cases behind the research actives in different mobility domains. Also two detailed descriptions and a comparison of two implementation for Multiple Independent Levels of Security and Safety (MILS) systems in mobility domains are included. In the end of the paper a outlook is given on potential further research activities on this research topic.
Download:
Momentan nicht verfügbar
BibTeX: Anzeigen
- D. Reinhardt, D. Adam, E. Lubbers, R. Amarnath, R. Schneider, S. Gansel, S. Schnitzer, C. Herber, T. Sandmann, H. U. Michel, D. Kaule, D. Olkun, M. Rehm, J. Harnisch, A. Richter, S. Baehr, O. Sander, J. Becker, U. Baumgarten, H. Theiling
Embedded Virtualization Approaches for Ensuring Safety and Security within E/E Automotive Systems
In Embedded World Conference, 2015
Zusammenfassung:
Automotive E/E systems are subject to several conflicting non-functional requirements. Monetary costs, shorter technology and time-to-market cycles and rising restrictions to energy consumption build a subset of them. Furthermore, existing safety and security criteria must be met. Because of future game
changers, like highly automated driving or share-economy scenarios, the relevance to incorporate such non-functional requirements within the product development will increase.
Within the ARAMiS (Automotive, Railway and Avionic Multicore Systems) project funded by BMBF, different use-cases of the industry and scientific partners were analyzed. The project goal is to enable multicore systems across mobility domains and show different technical concept implementations and detail the achieved improvements over traditional systems.
In ARAMiS, a special focus is placed on embedded virtualization technologies for ensuring safety and security according to existing standards (ISO26262). For isolation purposes and flexible software relocation of Enterprise Systems, hypervisors are already an attractive and proven approach. Here, we analyze virtualization methods within real-time systems for hardware and software to enable embedded hypervisors for automotive needs.
Within this paper, we present results arising from the work in the automotive domain within the ARAMiS research project. For that purpose, we have developed OEM specific demonstrator platforms for evaluation purposes to reflect typical automotive use-cases. These platforms are implemented on different hardware controllers, performance classes and mission scenarios. Specifically, we analyze the operation of mixed integrity systems.
As a result, the commonalities and technical challenges between demonstrator platforms are identified, and the suitability of virtualization technologies for embedded multicore controllers for automotive E/E systems is discussed. The results enable next generation scenarios for industry partners and provide guidance for future research activities.
Download:
Momentan nicht verfügbar
BibTeX: Anzeigen
Zusammenfassung:
Automotive E/E systems are subject to several conflicting non-functional requirements. Monetary costs, shorter technology and time-to-market cycles and rising restrictions to energy consumption build a subset of them. Furthermore, existing safety and security criteria must be met. Because of future game
changers, like highly automated driving or share-economy scenarios, the relevance to incorporate such non-functional requirements within the product development will increase.
Within the ARAMiS (Automotive, Railway and Avionic Multicore Systems) project funded by BMBF, different use-cases of the industry and scientific partners were analyzed. The project goal is to enable multicore systems across mobility domains and show different technical concept implementations and detail the achieved improvements over traditional systems.
In ARAMiS, a special focus is placed on embedded virtualization technologies for ensuring safety and security according to existing standards (ISO26262). For isolation purposes and flexible software relocation of Enterprise Systems, hypervisors are already an attractive and proven approach. Here, we analyze virtualization methods within real-time systems for hardware and software to enable embedded hypervisors for automotive needs.
Within this paper, we present results arising from the work in the automotive domain within the ARAMiS research project. For that purpose, we have developed OEM specific demonstrator platforms for evaluation purposes to reflect typical automotive use-cases. These platforms are implemented on different hardware controllers, performance classes and mission scenarios. Specifically, we analyze the operation of mixed integrity systems.
As a result, the commonalities and technical challenges between demonstrator platforms are identified, and the suitability of virtualization technologies for embedded multicore controllers for automotive E/E systems is discussed. The results enable next generation scenarios for industry partners and provide guidance for future research activities.
Download:
Momentan nicht verfügbar
BibTeX: Anzeigen
