RISC‑V NPU PE Collaboration Meeting at ITIV

On March 16–17, 2026, the Institute for Information Processing Technology (ITIV) at the Karlsruhe Institute of Technology (KIT) hosted the RISC‑V NPU PE Collaboration Meeting. Participants included representatives from the Universidad Politécnica de Madrid (UPM), the Vienna University of Technology (TUW), and the Research Center for Information Technology (FZI). Together with ITIV as the local organizer, the project partners used the two days to coordinate their contributions within the European research project Rigoletto.

The goal of the meeting was to harmonize the technical integration of the components developed by the individual partners and to define a joint roadmap for the further refinement of the RISC‑V‑based NPU architecture. Following a welcome by Prof. Dr.-Ing. Dr. h. c. Jürgen Becker (KIT), the meeting began on Monday with an overview of the current project status. This was followed by in‑depth technical discussions on the architecture of the Processing Elements (PE), module interfaces, and the upcoming integration steps.

Throughout the event, the teams from Madrid, Vienna, and Karlsruhe presented their latest results, challenges, and design approaches. The discussions covered a wide range of topics, from hardware microarchitectures to software toolchains to evaluation methodologies and system‑level integration. A particular focus was placed on aligning interface specifications to ensure that each partner’s contributions can be merged into a coherent overall system.

On the second day, the partners consolidated the technical findings and translated them into a joint project roadmap. This roadmap defines upcoming work packages, milestones, and integration phases within Rigoletto. The meeting concluded on Tuesday with a shared understanding of the next steps and a strong sense of progress achieved through close collaboration.

You can find more information on the official project website.