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Prof. Dr.-Ing. Dr. h. c. Jürgen Becker

Head of the Institute (speaker)
room: 324
phone: +49 721 608-42502
fax: +49 721 608-42925
beckerUfe3∂kit edu
Engesserstr. 5

76131 Karlsruhe

Prof. Dr.-Ing. Dr. h. c. Jürgen Becker

Curriculum Vitae

Juergen Becker received the Diploma degree in 1992, and his Ph.D. (Dr.-Ing.) degree in 1997, both at Kaiserslautern University, Germany. His research work focused on application development environments for reconfigurable accelerators and included hardware/software codesign, parallelizing compilers, customized computing, and high-level synthesis. He has been local administrator for the European Design Project EUROCHIP in 1993/95. In 1997 Dr. Becker joined the Institute of Microelectronic Systems at Darmstadt University of Technology, Germany, as assistant professor, where he taught CAD algorithms for VLSI design. He did research in Systems-on-Chip (SoC) architectures and reconfigurable technologies for mobile communication systems, including the development of corresponding IP-based CAD methods.

Since 2001 Juergen Becker is professor for embedded electronic systems at the Institut fuer Technik der Informationsverarbeitung (ITIV) at the University of Karlsruhe. He gives lectures in digital design (undergraduate), in CAD algorithms for high-level synthesis and VLSI design, hardware/software codesign, as well as in bus interfaces and protocols. His actual research is focused on industrial-driven SoCs with emphasis on adaptive embedded systems, e.g. dynamically reconfigurable hardware architectures. This includes corresponding hardware/software codesign and co-synthesis techniques from high-level specifications, as well as low power SoC optimization. Prof. Becker is co-director of the Embedded Systems and Sensors Engineering (ESS) group at the Computer Science Research Center (FZI).

He is author and co-author of more than 400 scientific papers (+ more than 30 patents), published in peer-reviewed international journals and conferences and active in several technical program and steering committees of international conferences and workshops. Prof. Becker started in October 2004 as Vice President of Universität Karlsruhe (TH) responsible for the area Studies and Teaching, respectively since October 2009 to March 2012 as Chief Higher Education Officer (CHEO) of the KIT.

From 2012 until 2014 he serves as Secretary General of CLUSTER, an association of 12 leading technical universities in Europe. In 2013 Prof. Becker received the Honorary Doctor award (Dr. h. c.) from Technical University Budapest (Hungary).




Management of the research area "Embedded electronic Systems" with the projects

  • System Design for Reconfigurable Hardware in Automotive Technology
  • IP-based Design of Microelectronics for Mobile Communication Systems
  • Hardware/Software Codesign and Architecture Synthesis
  • Hardware Synthesis and System-on-Chip-Integration
  • Development and evaluation of optimized algorithms for 3D-Reconstruction on FPGAs and GPUs
  • New hard- and software architektures for the CMS Tracktrigger 








    • FPL (International Conference on Field-Programmable Logic and Applications)
    • RAW (Reconfigurable Architecture Workshop)
    • ARC (International Symposium on Applied Reconfigurable Computing)
    • ISVLSI (IEEE Computer Society Annual Symposium on VLSI)
    • IEEE SOCC (IEEE International System-on-Chip Conference)
    • PATMOS (International Workshop on Power And Timing Modeling, Optimization and Simulation)




    Project ARAMiS II



    Project ARAMiS



    Project ARGO



    Project InvasIC







    emmtrix Technologies GmbH





    Latest publications

    Journals & Books
    • H. Bucher, F. Buciuman, A. Klimm, O. Sander, J. Becker
      A V2X Message Evaluation Methodology and Cross-Domain Modelling of Safety Applications in V2X-enabled E/E-Architectures
      In EAI Endorsed Transactions on Security and Safety, Band 3, 2016

    • O. Sander, F. Bapp, T. Sandmann, L. Dieudonne, J. Becker
      The promised future of multi-core processors in avionics systems
      In CEAS Aeronautical Journal, 2016

    • C. Tradowsky, E. Cordero, C. Orsinger, M. Vesper, J. Becker
      Adaptive Cache Structures
      In Architecture of Computing Systems -- ARCS 2016: 29th International Conference, Nuremberg, Germany, April 4-7, 2016, Proceedings, S. 87--99, 2016

    Conferences & Workshops
    • H. Bucher, C. Reichmann, J. Becker
      An Integrated Approach Enabling Cross-Domain Simulation of Model-Based E/E-Architectures
      In SAE World Congress Experience (WCX), Technical Paper (approved for publication), 2017

    • S. Friederich, M. Neber, J. Becker
      Power Management Controller for Online Power Saving in Network-on-Chips
      In International Symposium on Embedded Multicore/Manycore SoCs (MCSoC), Band 10, 2016

    • L. Meder, D. Emschermann, J. Frühauf, W. F. J. Müller, J. Becker
      A timing synchronizer system for beam test setups requiring galvanic isolation
      In 2016 IEEE-NPSS Real Time Conference (RT), S. 1-3, 2016

    List publications according to year
    Latest 2017 2016 2015 2014 2013 2012 2011 2010 2009 2008 2007 2006 2005 2004 2003 2002 2001 2000 1999 1998 1997 1996 1995