Juergen Becker received the Diploma degree in 1992, and his Ph.D. (Dr.-Ing.) degree in 1997, both at Kaiserslautern University, Germany. His research work focused on application development environments for reconfigurable accelerators and included hardware/software codesign, parallelizing compilers, customized computing, and high-level synthesis. He has been local administrator for the European Design Project EUROCHIP in 1993/95. In 1997 Dr. Becker joined the Institute of Microelectronic Systems at Darmstadt University of Technology, Germany, as assistant professor, where he taught CAD algorithms for VLSI design. He did research in Systems-on-Chip (SoC) architectures and reconfigurable technologies for mobile communication systems, including the development of corresponding IP-based CAD methods.
Since 2001 Juergen Becker is professor for embedded electronic systems at the Institut fuer Technik der Informationsverarbeitung (ITIV) at the University of Karlsruhe. He gives lectures in digital design (undergraduate), in CAD algorithms for high-level synthesis and VLSI design, hardware/software codesign, as well as in bus interfaces and protocols. His actual research is focused on industrial-driven SoCs with emphasis on adaptive embedded systems, e.g. dynamically reconfigurable hardware architectures. This includes corresponding hardware/software codesign and co-synthesis techniques from high-level specifications, as well as low power SoC optimization. Prof. Becker is co-director of the Embedded Systems and Sensors Engineering (ESS) group at the Computer Science Research Center (FZI).
He is author and co-author of more than 250 scientific papers, published in peer-reviewed international journals and conferences and active in several technical program and steering committees of international conferences and workshops. He is a Member of the german GI and Senior Member of the IEEE. Prof. Becker is chair of the GI/ITG Technical Committee of 'Architekturen fuer hochintegrierte Schaltungen' and is member of "Editorial Board of IEEE Transaction on Computers" and "Executive Committee der Deutschen Sektion des IEEE". Prof. Becker started in October 2004 as Vice President of Universität Karlsruhe (TH) responsible for the area Studies and Teaching, respectively since October 2009 to March 2012 as Chief Higher Education Officer (CHEO) of the KIT.
Management of the research area "Embedded electronic Systems" with the projects
Head of the Institute|
phone: +49 721 608-42502
fax: +49 721 608-42511
Prof. Dr.-Ing. Jürgen Becker
- L. Ost, R. Garibotti, G. Sassatelli, G. Almeida, R. Busseuil, A. Butko, M. Robert, J. Becker
Novel Techniques for Smart Adaptive Multiprocessor SoCs (Link)
In IEEE Transactions on Computers, Band 99, S. 1, 2013
- G. Almeida, O. Longhi, T. Bruckschloegl, M. Huebner, F. Hessel, J. Becker
Simplify: a Framework for Enabling Fast Functional/Behavioral Validation of Multiprocessor Architectures in the Cloud
In 1st Workshop on Virtual Prototyping of Parallel and Embedded Systems, 2013
- P. Schindler, R. Schmogrow, M. Dreschmann, J. Meyer, D. Hillerkuss, I. Tomkos, J. Prat, H. G. Krimmel, T. Pfeiffer, P. Kourtessis, J. Becker, C. Koos, W. Freude, J. Leuthold
Flexible WDM-PON with Nyquist-FDM and 31.25 Gbit/s per Wavelength Channel Using Colorless, Low-Speed ONUs (Link)
In Optical Fiber Communication Conference/National Fiber Optic Engineers Conference 2013, S. OW1A.5, 2013
- C. Tradowsky, T. Harbaum, S. Deyerle, J. Becker
LImbiC: An Adaptable Architecture Description Language Model for Developing an Application-Specific Image Processor
In Annual Symposium on VLSI, 2013
- J. Heisswolf, A. Zaib, A. Weichslgartner, R. Koenig, T. Wild, J. Teich, A. Herkersdorf, J. Becker
Virtual Networks - Distributed Communication Resource Management
In ACM Trans. Reconfigurable Technol. Syst., S. 13, 2013