Arthur Silitonga, M.Sc.

Arthur Silitonga, M.Sc.

  • Engesserstr. 5

    76131 Karlsruhe

M. Sc. Arthur Silitonga

Short Bio/CV:

  • Bachelor of Science, Electrical Engineering, Institut Teknologi Bandung (ITB), Indonesia
    • Bachelor Final Year’s Project: An Interface Design based on TCP/IP Protocol and its Implementation onto FPGA - Altera® Nios Board
  • Master of Science, Faculty of Electrical Engineering and Information Technology, Karlsruher Institut für Technologie (KIT)
    • Concentration: Information and Communications Engineering
    • Master Thesis: Development and Evaluation of a Generic Prototyping Environment for ASIC & FPGA
  • Doktorand/Research Assistant at ITIV since December 2016


Research Interests/Forschungsinteressen:

  • Applied Cryptography and Hardware Security in Multiprocessor System-on-Chip (SoC)
  • Software-defined Multiprocessor SoC and High-Level Synthesis
  • Reconfigurable Architectures in Multiprocessor SoC


Supervised completed student work/betreute abgeschlossene studentische Arbeiten:

  • MA: Untersuchung von High-Level Synthese zur Entwicklung eines Kryptographiemoduls für rekonfigurierbare Hardwareplattformen
  • MA: Implementation and Evaluation of Partially Reconfigurable Multiple Symmetric Crypto Algorithms in SoC
  • BA: Implementation and Analysis of an Asymmetric Crypto Algorithm with Multiple Key Lengths Using Partial Reconfiguration in SoC
  • MA: Introduction and the Influence of Microarchitectural Attacks at Processing System of a System-on-Chip
  • BA: The Cutting-Edge Concepts and Basic Implementation of Attack in CAN-Bus Network
  • MA: Channel Estimation of Dynamic Intra-Tile Reallocatable Cache in Homogeneous GPPs



Security-driven Cross-Layer Model & Description of a HW/SW Framework for AP MPSoC-based Computing Device.
Silitonga, A.; Becker, J.
2021. The 14th IEEE International Systems Conference (SYSCON), Montreal, Canada (Virtual), 24-27 August, 2020, Institute of Electrical and Electronics Engineers (IEEE). doi:10.1109/SysCon47679.2020.9353653
MiteS: Software-based Microarchitectural Attacks and Countermeasures in networked AP SoC Platforms.
Silitonga, A.; Gassoumi, H.; Becker, J.
2020. The 14th IEEE International Conference on Anti-counterfeiting, Security, and Identification (ASID), Xiamen, China (Virtual), Oct. 31-Nov. 1, 2020, 65–71, Institute of Electrical and Electronics Engineers (IEEE). doi:10.1109/ASID50160.2020.9271734
Reconfigurable Module of Multi-mode AES Cryptographic Algorithms for AP SoCs.
Silitonga, A.; Jiang, Z.; Khan, N.; Becker, J.
2019. 2019 IEEE Nordic Circuits and Systems Conference (NorCAS), Helsinki, FIN, October 29-30, 2019, Institute of Electrical and Electronics Engineers (IEEE). doi:10.1109/NORCHIP.2019.8906923
Secure Local Configuration of Intellectual Property Without a Trusted Third Party.
Khan, N.; Silitonga, A.; Pachideh, B.; Nitzsche, S.; Becker, J.
2019. Applied reconfigurable computing : 15th international symposium, ARC 2019, Darmstadt, Germany, April 9-11, 2019 : proceedings, 137–146, Springer. doi:10.1007/978-3-030-17227-5_11
HLS-based Performance and Resource Optimization of Cryptographic Modules.
Silitonga, A.; Schade, F.; Jiang, G.; Becker, J.
2018. Proceedings of the 16th IEEE International Symposium on Parallel and Distributed Processing with Applications (ISPA2018), Melbourne, Australia, 11th-13th December 2018, 1009–1016, Institute of Electrical and Electronics Engineers (IEEE). doi:10.1109/BDCloud.2018.00147
An emulation of transparent interface design based on TCP/IP implemented onto FPGA of an Altera Nios® Board.
Silitonga, A.; Hutabarat, M.
2015. 2015 9th International Conference on Telecommunication Systems Services and Applications (TSSA), Bandung, 25–26 November 2015, Art.Nr. 7440432, Institute of Electrical and Electronics Engineers (IEEE). doi:10.1109/TSSA.2015.7440432
Concept implementation of sole module for software-based UL subframe mapping method on a TDD WiMAX IEEE 802.16e-based Subscriber Station.
Silitonga, A.; Adiono, T.; Wicaksono, I.
2014. 2014 2nd International Conference on Information and Communication Technology (ICoICT), Bandung, Indonesia, 28–30 May 2014, 340–345, Institute of Electrical and Electronics Engineers (IEEE). doi:10.1109/ICoICT.2014.6914089
Evaluation of X2-handover performance based on RSRP measurement with Friis path loss using network simulator version 3 (NS-3).
Assyadzily, M.; Suhartomo, A.; Silitonga, A.
2014. 2014 2nd International Conference on Information and Communication Technology (ICoICT), Bandung, Indonesia, 28–30 May 2014, 436–441, Institute of Electrical and Electronics Engineers (IEEE). doi:10.1109/ICoICT.2014.6914102
Ontology-based knowledge representation of failure mode and effect analysis on Electric/Electronic Architecture modeling conforming to the ISO 26262.
Silitonga, A.; Hillenbrand, M.
2014. 2014 International Conference of Advanced Informatics: Concept, Theory and Application (ICAICTA), Bandung, Indonesia, 20–21 August 2014, 260–265, Institute of Electrical and Electronics Engineers (IEEE). doi:10.1109/ICAICTA.2014.7005951
A new approach of quantum-inspired genetic algorithm for self-generation of fuzzy logic controller.
Bukhori, I.; Silitonga, A.
2014. 2014 IEEE International Conference on Intelligent Autonomous Agents, Networks and Systems (INAGENTSYS), BANDUNG, Indonesia, 19–21 August 2014, 30–35, Institute of Electrical and Electronics Engineers (IEEE). doi:10.1109/INAGENTSYS.2014.7005721
Infrared Depth Sensor Kinect-based Smart Room Controller.
Silitonga, A.; Thoeng, S.
2013. Proceedings of 2014 IEEE Sensors Applications Symposium (SAS); Queenstown, New Zealand; February, 18-20, 2014
Blind and lighting control to maintain comfort light intensity of the classroom utilizing Microcontroller ATmega8535.
Silitonga, A.; Indrawan, I. G. L. W.
2013. 2013 International Conference on Information Technology and Electrical Engineering (ICITEE), Yogyakarta, Indonesia, 7–8 October 2013, 438–443, Institute of Electrical and Electronics Engineers (IEEE). doi:10.1109/ICITEED.2013.6676282