Hardware Modeling and Simulation

  • Type: Vorlesung (V)
  • Chair: KIT-Fakultäten - KIT-Fakultät für Elektrotechnik und Informationstechnik - Institut für Technik der Informationsverarbeitung
    KIT-Fakultäten - KIT-Fakultät für Elektrotechnik und Informationstechnik
  • Semester: WS 22/23
  • Time:

    ab 25.10.2023
    Mittwochs 11:30 - 13:00, wöchentlich
    30.10 Nachrichtentechnik-Hörsaal (NTI)
    30.10 Nachrichtentechnik, Institutsgebäude (EG)

  • Lecturer:

    Prof. Dr.-Ing. Dr. h.c. Jürgen Becker
    Dr.-Ing. Jens Becker

  • SWS: 2
  • Lv-no.: 2311608
  • Information:

    Presence

Lecture languageEnglish

Note

Please refer to the respective ILIAS course for the specific dates.

Hardware Modeling and Simulation

Recommendations

Basic knowledge of digital technology is an advantage.

Objectives

After completing the module, students have basic knowledge of the design process of mechatronic systems with the help of simulators, both for digital and analog circuit parts. They will also have knowledge of cross-domain models in VHDL-AMS that contain mixed digital, analog and/or mechanical parts. Students understand the basics of error simulations for the verifiability of fabricated circuits and are able to derive test vectors. They can derive OBDDs and thus check the functional equivalence of two different models of digital circuits.
In addition, students have basic and detailed knowledge of the hardware description language VHDL. They are able to model circuit parts and take into account the special features of the time behavior of modeled components. They will be able to create testbenches for models in order to initiate functional and timing verification.

Contents

By supporting the design of electronic circuits with CAE tools, which have spread rapidly in recent years, a considerable acceleration of the entire design process has been achieved. In this lecture, the basic design of electronic systems using CAE tools and the use of hardware description languages will be considered. The step-by-step procedure is taught using levels of abstraction. Verification methods for the correctness of designs will be discussed as well as the requirements for industrial design automation systems.