	Dipl.-Inform. Thomas Bruckschlögl
	Member of Scientific Staff room: 126 phone: +49 721 608-45282 fax: +49 721 608-42511 thomas bruckschloeglTyo9∂kit edu	Engesserstr. 5 76131 Karlsruhe

Dipl.-Inform. Thomas Bruckschlögl

Digitaltechnik

Dipl.-Inform. Thomas Bruckschlögl
title	time
Entwurf, Modellierung und Evaluierung der Cache- bzw. Speicher-Hierarchie auf Basis des LEON3	available

G. Almeida, O. Longhi, T. Bruckschloegl, M. Huebner, F. Hessel, J. Becker
Simplify: a Framework for Enabling Fast Functional/Behavioral Validation of Multiprocessor Architectures in the Cloud
In 1st Workshop on Virtual Prototyping of Parallel and Embedded Systems, 2013

G. Shalina, T. Bruckschloegl, P. Figuli, C. Tradowsky, G. Almeida, J. Becker
Bringing Accuracy to Open Virtual Platforms (OVP): A Safari from High-Level Tools to Low-Level Microarchitectures
In International Conference on Intelligent Instrumentation, Optimization and Signal Processing, 2013

T. Stripf, O. Oey, T. Bruckschloegl, R. Koenig, J. Becker, G. Goulas, P. Alefragis, N. S. Voros, J. Potman, K. Sunesen, S. Derrien, O. Sentieys
A Compilation- and Simulation-Oriented Architecture Description Language for Multicore Systems (Link)
In Computational Science and Engineering (CSE), 2012 IEEE 15th International Conference on, S. 383-390, 2012

T. Stripf, O. Oey, T. Bruckschloegl, R. Koenig, M. Huebner, G. Goulas, P. Alefragis, N. S. Voros, G. Rauwerda, K. Sunesen, S. Derrien, D. Menard, O. Sentieys, N. Kavvadias, G. Dimitroulakos, K. Masselos, D. Goehringer, T. Perschke, D. Kritharidis, N. Mitas, J. Becker
A Flexible Approach for Compiling Scilab to Reconfigurable Multi-Core Embedded Systems (Link)
In 2012 7th International Workshop on Reconfigurable Communication-centric Systems-on-Chip {(ReCoSoC)}, 2012

P. Figuli, M. Huebner, R. Girardey, F. Bapp, T. Bruckschloegl, F. Thoma, J. Henkel, J. Becker
A heterogeneous SoC Architecture with embedded virtual fpga Cores and Runtime core Fusion (Link)
In NASA/ESA 6th Conference on Adaptive Hardware and Systems (AHS 2011), 2011