Curriculum Vitae

• Born in january of 1976

• at the ITIV since october 2006

Latest publications

• M. Ruemmele-Werner, T. Perschke, L. Braun, M. Huebner, J. Becker
  A FPGA based fast runtime reconfigurable real-time Multi-Object-Tracker (Link)
  In Circuits and Systems (ISCAS), 2011 IEEE International Symposium on, S. 853 -856, 2011


• N. Frietsch, I. Pashkovskiy, G. F. Trommer, L. Braun, M. Birk, M. Huebner, J. Becker
  Development of a method for image-based motion estimation of a VTOL-MAV on FPGA (Link)
  In Design and Architectures for Signal and Image Processing (DASIP), 2011 Conference on, S. 1 -8, 2011


• M. Huebner, C. Tradowsky, D. Goehringer, L. Braun, F. Thoma, J. Henkel, J. Becker
  Dynamic Processor Reconfiguration (Link)
  In Reconfigurable Computing and FPGAs (ReConFig), 2011 International Conference on, S. 123 -128, 2011


• J. M. P. Cardoso, P. C. Diniz, Z. Petrov, K. Bertels, M. Huebner, H. van Someren, F. Gonçalves, J. G. de F. Coutinho, G. Constantinides, B. Olivier, W. Luk, J. Becker, G. Kuzmanov, F. Thoma, L. Braun, M. Kuehnle, R. Nane, V. Sima, K. Krátký, J. C. Alves, J. C. Ferreira
  REFLECT: Rendering FPGAs to Multi-Core Embedded Computing
  In Reconfigurable Computing: From FPGAs to Hardware/Software Codesign, 2011


• J. Meyer, M. Huebner, L. Braun, O. Sander, J. Noguera, R. Stewart, J. Becker
  FPGA Startup Through Sequential Partial and Dynamic Reconfiguration (Link)
  In VLSI 2010 Annual Symposium, Band 105, S. 289-302, 2011

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